module fw_bw_pipe #(
	parameter WIDTH = 32)
(
	input clk,
	input rst_n,
	
	input [WIDTH -1:0]data_in,
	input 			  data_in_valid,
	output			  data_in_ready,
	
	output[WIDTH -1:0]data_out,
	output			  data_out_valid,
	input			  data_out_ready
);

wire[WIDTH -1:0]inner_data_out;
wire		    inner_data_out_valid;
wire		    inner_data_out_ready;
bw_pipe #(.WIDTH(WIDTH))
u_bw_pipe(
	.clk            (clk),
	.rst_n          (rst_n),
	
	.data_in        (data_in),
	.data_in_valid  (data_in_valid),
	.data_in_ready  (data_in_ready),
	
	.data_out       (inner_data_out),
	.data_out_valid (inner_data_out_valid),
	.data_out_ready (inner_data_out_valid)
);

fw_pipe #(.WIDTH(WIDTH))
u_fw_pipe(
	.clk            (clk),
	.rst_n          (rst_n),
	
	.data_in        (inner_data_out),
	.data_in_valid  (inner_data_out_valid),
	.data_in_ready  (inner_data_out_valid),
	
	.data_out       (data_out),
	.data_out_valid (data_out_valid),
	.data_out_ready (data_out_valid)
);

endmodule
